16-Bit Mpg Output Control Register (Upper) (Opcur) - Fujitsu 8FX Hardware Manual

MB95630H Series
21.6.1 16-bit MPG Output Control Register (Upper)
(OPCUR)
The 16-bit MPG output control register (upper) (OPCUR) controls the write
timing interrupt, the data transfer method and the DTTI pin.
■ Register Configuration
bit 7
Field DTIE
Attribute R/W
Initial value 0
■ Register Functions
[bit7] DTIE: DTTI control enable bit
This bit enables or disables the DTTI pin input.
It enables the DTT1 pin to control the output levels of the OPT5 to OPT0 pins. The software can set the
inactive level for an OPTx pin according to the setting of the PDRx register corresponding to that OPTx pin.
bit7
Writing "0"
Writing "1"
[bit6] DTIF: DTTI interrupt request flag bit
This bit is the DTTI input interrupt request flag.
With the DTTI control enable bit (DTIE) already set to "1", when a falling edge of DTTI is detected, this bit
is set to "1" and a DTTI interrupt is generated.
Writing "0" to this bit clears it. Writing "1" to this bit has no effect on operation.
When read by the read-modify-write (RMW) type of instruction, this bit always returns "1".
bit6
Reading "0"
Reading "1"
Writing "0"
Writing "1"
[bit5] NRSL: Noise filter enable bit
This bit selects the noise cancellation function to be used when the DTTI pin input is enabled.
The noise cancellation circuit starts the internal n-bit counter when an active level is input (the value of n can
be 2, 3, 4 or 5, which depends on the setting of D[1:0] bits in the noise cancellation control register). If the
active level is held until the counter overflows, the circuit accepts input from the DTTI pin. Therefore, the
pulse width of noise that can be cancelled is about 2
bit5
Writing "0"
Writing "1"
Note: When the noise cancellation circuit is enabled, the DTTI pin input becomes invalid in a mode such as
stop mode in which the internal clock is stopped.
MN702-00009-2v0-E
6 5
DTIF NRSL
R/W R/W
0 0
Disables using the DTTI pin input to control the output level.
Enables using the DTTI pin input to control the output level.
Indicates that no falling edge of DTTI has been detected.
Indicates that a falling edge of DTTI has been detected.
Clears this bit.
Has no effect on operation.
The DTTI pin input will not pass through the noise filter.
The DTTI pin input will pass through the noise filter.
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 21 MULTI-PULSE GENERATOR
4 3
OPS2 OPS1
R/W R/W
0 0
Details
Details
n
machine cycles.
Details
21.6 Registers
2 1
OPS0 WTIF
R/W R/W
0 0
0
WTIE
R/W
0
427