Fujitsu 8FX Hardware Manual page 496

CHAPTER 22 UART/SIO
22.6 Operations and Setting Procedure Example
● Transmission in UART/SIO operation mode 1
For transmission in operation mode 1, each register is used as shown below.
Figure 22.6-14 Registers Used for Transmission in Operation Mode 1
SMC1n (UART/SIO serial mode control register 1)
SMC2n (UART/SIO serial mode control register 2)
SSRn (UART/SIO serial status and data register)
TDRn (UART/SIO serial output data register)
RDRn (UART/SIO serial input data register)
: Used bit
: Unused bit
1 : Set to "1"
0 : Set to "0"
The following two procedures can be used to initiate the transmission process:
• Set the transmission operation enable bit (TXE) to "1", then write transmit data to the
TDRn register to start transmission.
• Write transmit data to the TDRn register, then set the TXE bit to "1" to start transmission.
Transmit data is written to the TDRn register after it is checked that the transmit data register
empty flag bit (TDRE) is set to "1".
When the transmit data is written to the TDRn register, the TDRE bit is cleared to "0".
When serial transmission is started after transmit data is transferred from the TDRn register to
the transmission shift register, the TDRE bit is set to "1".
474
bit7 bit6 bit5
BDS PEN TDP
bit7 bit6 bit5
SCKE TXOE RERC
1
bit7 bit6 bit5
PER
- -
bit7 bit6 bit5
TD7 TD6 TD5
bit7 bit6 bit5
RD7 RD6 RD5
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
bit4 bit3 bit2
SBL CBL1 CBL0
bit4 bit3 bit2
RXE TXE RIE
bit4 bit3 bit2
OVE FER RDRF
bit4 bit3 bit2
TD4 TD3 TD2
bit4 bit3 bit2
RD4 RD3 RD2
bit1 bit0
CKS MD
1
bit1 bit0
TCIE TEIE
bit1 bit0
TCPL TDRE
bit1 bit0
TD1 TD0
bit1 bit0
RD1 RD0
MN702-00009-2v0-E