Lin-Uart Serial Status Register (Ssr) - Fujitsu 8FX Hardware Manual

CHAPTER 14 LIN-UART
14.7 Registers
14.7.3

LIN-UART Serial Status Register (SSR)

The LIN-UART serial status register (SSR) is used to check the status of
transmission, reception and error, and to enable and disable interrupts.
■ Register Configuration
bit 7
Field PE
Attribute R
Initial value 0
■ Register Functions
[bit7] PE: Parity error flag bit
This flag bit detects the parity error in received data.
This bit is set to "1" when a parity error occurs during reception, and cleared by writing "1" to the CRE bit in
the LIN-UART serial control register (SCR).
When both the PE bit and the RIE bit are "1", a receive interrupt request is output.
When this flag is set, the data in the receive data register (RDR) is invalid.
bit7
Reading "0"
Reading "1"
[bit6] ORE: Overrun error flag bit
This flag bit detects the overrun error in received data.
This bit is set to "1" when an overrun occurs during reception, and cleared by writing "1" to the CRE bit in
the LIN-UART serial control register (SCR).
When both the ORE bit and the RIE bit are "1", a receive interrupt request is output.
When this flag is set, the data in the receive data register (RDR) is invalid.
bit6
Reading "0"
Reading "1"
[bit5] FRE: Framing error flag bit
This flag bit detects the framing error in received data.
This bit is set to "1" when a framing error occurs during reception, and cleared by writing "1" to the CRE bit
in the LIN-UART serial control register (SCR).
When both the FRE bit and the RIE bit are "1", a receive interrupt request is output.
When this flag is set, the data in the LIN-UART receive data register (RDR) is invalid.
bit5
Reading "0"
Reading "1"
248
6 5
ORE FRE
R R
0 0
Indicates that no parity error has been detected.
Indicates that a parity error has been detected.
Indicates that no overrun error has been detected.
Indicates that an overrun error has been detected.
Indicates that no framing error has been detected.
Indicates that a framing error has been detected.
FUJITSU SEMICONDUCTOR LIMITED
4 3
RDRF TDRE
R R
0 1
Details
Details
Details
MB95630H Series
2 1
BDS RIE
R/W R/W
0 0
MN702-00009-2v0-E
0
TIE
R/W
0