External Interrupt Control Register (Eic) - Fujitsu 8FX Hardware Manual

CHAPTER 12 EXTERNAL INTERRUPT CIRCUIT
12.7 Register
12.7.1

External Interrupt Control Register (EIC)

The external interrupt control register (EIC) is used to select the edge polarity
for the external interrupt input and control interrupts.
■ Register Configuration
bit 7
Field EIR1
Attribute R/W
Initial value 0
■ Register Functions
[bit7] EIR1: External interrupt request flag bit 1
This flag is set to "1" when the edge selected by the edge polarity select bits 1 (SL1[1:0]) is input to the
external interrupt pin INTn+1.
When this bit and the interrupt request enable bit 1 (EIE1) are set to "1", an interrupt request is output.
Writing "0" clears this bit. Writing "1" has no effect on operation.
When read by the read-modify-write (RMW) type of instruction, this bit always returns "1".
bit7
Reading "0"
Reading "1"
Writing "0"
Writing "1"
[bit6:5] SL1[1:0]: Edge polarity select bits 1
These bits select the polarity of an edge of the pulse input to the external interrupt pin INTn+1. The edge
selected is to be the interrupt source.
If these bits are set to "0b00", no edge detection is performed and no interrupt request is made.
If these bits are set to "0b01", rising edges are to be detected; if "0b10", falling edges are to be detected; if
"0b11", both edges are to be detected.
bit6:5
Writing "00"
Writing "01"
Writing "10"
Writing "11"
[bit4] EIE1: Interrupt request enable bit 1
This bit enables or disables outputting the interrupt request to the interrupt controller. When this bit and the
external interrupt request flag bit 1 (EIR1) are "1", an interrupt request is output.
When using an external interrupt pin, write "0" to the corresponding bit in the port direction register (DDR)
to set the pin as an input port.
The status of the external interrupt pin can be read directly from the port data register, regardless of the status
of the interrupt request enable bit.
bit4
Writing "0"
Writing "1"
184
6 5
SL11 SL10
R/W R/W
0 0
Indicates that the specified edge has not been input.
Indicates that the specified edge has been input.
Clears this bit.
Has no effect on operation.
No edge detection
Rising edge
Falling edge
Both edges
Disables outputting the interrupt request.
Enables outputting the interrupt request.
FUJITSU SEMICONDUCTOR LIMITED
4 3
EIE1 EIR0
R/W R/W
0 0
Details
Details
Details
MB95630H Series
2 1
SL01 SL00
R/W R/W
0 0
MN702-00009-2v0-E
0
EIE0
R/W
0