Fujitsu 8FX Hardware Manual page 358

8-bit microcontroller new 8fx family
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CHAPTER 19 16-BIT PPG TIMER
19.2 Configuration
● Comparator circuit
The output is kept "H" until the value of 16-bit downcounter is corresponding to the value of
the 16-bit PPG duty setting buffer register from the value of 16-bit PPG cycle setting buffer
register.
Afterwards, after keep "L" the output until the counter value is corresponding to "1", it keeps
counting 16-bit downcounter from the value of 16-bit PPG cycle setting buffer register.
● 16-bit PPG downcounter register (upper/lower) ch. n (PDCRHn/PDCRLn)
The value of 16-bit downcounter of 16-bit PPG timer is read.
● 16-bit PPG cycle setting buffer register (upper/lower) ch. n (PCSRHn/PCSRLn)
The compare value for the cycle of 16-bit PPG timer is set.
● 16-bit PPG duty setting buffer register (upper/lower) ch. n (PDUTHn/PDUTLn)
The compare value for "H" width of 16-bit PPG timer is set.
● 16-bit PPG status control register (upper/lower) ch. n (PCNTHn/PCNTLn)
The operation mode and the operation condition of 16-bit PPG timer are set.
■ Input Clock
The 16-bit PPG timer uses the output clock from the prescaler as its input clock (count clock).
336
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
MN702-00009-2v0-E

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