Overview - Fujitsu 8FX Hardware Manual

CHAPTER 14 LIN-UART

14.1 Overview

14.1 Overview
The LIN (Local Interconnect Network)-UART is a general-purpose serial data
communication interface for synchronous or asynchronous (start-stop
synchronization) communication with external devices. In addition to a bi-
directional communication
communication function (multiprocessor mode: supports both master and
slave operation), the LIN-UART also supports special functions with the LIN
bus.
■ Functions of LIN-UART
The LIN-UART is a general-purpose serial data communication interface for exchanging serial
data with other CPUs and peripheral devices. Table 14.1-1 lists the functions of the LIN-
UART.
Table 14.1-1 Functions of LIN-UART
Data buffer
Serial input
Transfer mode
Baud rate
Data length
Signal type
Start bit timing
Reception error detection
Interrupt request
Master/slave mode communication
function (Multiprocessor mode)
Synchronous mode
Pin access
LIN bus option
Synchronous serial clock
Clock delay option
198
function (normal
Full-duplex double-buffer
The LIN-UART oversamples received data for five times to determine the received
value by majority of sampling values (only asynchronous mode).
• Clock synchronous (Select start/stop synchronization, or start/stop bits)
• Clock asynchronous (Start/stop bits available)
• Dedicated baud rate generator provided (made of a 15-bit reload counter)
• The external clock can be inputted. It can be adjusted by the reload counter.
• 7 bits (not in synchronous or LIN mode)
• 8 bits
NRZ (Non Return to Zero)
Synchronization with the start bit falling edge in asynchronous mode.
• Framing error
• Overrun error
• Parity error (Not supported in operating mode 1)
• Receive interrupts (reception completed, reception error detected, LIN synch break
detected)
• Transmit interrupts (transmit data empty)
• Interrupt requests to TII0 (LIN synch field detected: LSYN)
Capable of 1 (master) to n (slaves) communication
(supports both the master and slave system)
Transmit side/receive side of serial clock
Serial I/O pin states can be read directly.
• Master device operation
• Slave device operation
• LIN synch break detection
• LIN synch break generation
• Detection of LIN synch field start/stop edges connected to the 8/16-bit composite
timer
Continuous output to the SCK pin enabled for synchronous communication using the
start/stop bits
Special synchronous clock mode for delaying the clock (used in Serial Peripheral
Interface (SPI))
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
mode) and
Function
MN702-00009-2v0-E
master/slave