16-Bit Ppg Duty Setting Buffer Register (Upper/Lower) Ch. N (Pduthn/Pdutln) - Fujitsu 8FX Hardware Manual

MB95630H Series
19.7.3 16-bit PPG Duty Setting Buffer Register
(Upper/Lower) ch. n (PDUTHn/PDUTLn)
The 16-bit PPG duty setting buffer registers ch. n control the duty ratio for the
output pulses generated by the PPG.
■ Register Configuration
PDUTHn
bit 7
Field DU15
Attribute R/W
Initial value 1
PDUTLn
bit 7
Field DU07
Attribute R/W
Initial value 1
■ Register Functions
These registers form a 16-bit register which controls the duty ratio for the output pulses
generated by the PPG. Transfer of the data from the 16-bit PPG duty setting buffer registers to
the duty setting registers is performed at the same timing as the downcounter read.
When writing to these registers, always use one of the following procedures.
• Use the "MOVW" instruction (use a 16-bit access instruction to write to the PDUTHn
register address).
• Use the "MOV" instruction and write to PDUTHn first and then PDUTLn.
If a downcounter load occurs after writing data to PDUTHn (but before writing data to
PDUTLn), the value of the 16-bit PPG duty setting buffer registers is not transferred to the
duty setting registers.
The relations between the value of the 16-bit PPG duty setting registers and output pulse are
explained below.
• When the same value is set in both the 16-bit PPG cycle setting buffer registers and duty
setting registers, the "H" level will always be output if normal polarity is set, or the "L"
level will always be output if inverted polarity is set.
• When the duty setting registers are set to "0x0000", the "L" level will always be output if
normal polarity is set, or the "H" level will always be output if inverted polarity is set.
• When the value set in the duty setting registers is greater than the value in the 16-bit PPG
cycle setting buffer registers, the "L" level will always be output if normal polarity is set,
and the "H" level will always be output if inverted polarity is set.
MN702-00009-2v0-E
6 5
DU14 DU13
R/W R/W
1 1
6 5
DU06 DU05
R/W R/W
1 1
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 19 16-BIT PPG TIMER
4 3
DU12 DU11
R/W R/W
1 1
4 3
DU04 DU03
R/W R/W
1 1
19.7 Registers
2 1
DU10 DU09
R/W R/W
1 1
2 1
DU02 DU01
R/W R/W
1 1
0
DU08
R/W
1
0
DU00
R/W
1
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