Interrupt - Fujitsu 8FX Hardware Manual

MB95630H Series
7.3

Interrupt

An interrupt request is generated when the interval time selected by the time-
base timer elapses (interval timer function).
■ Interrupt When Interval Function Is in Operation
When the time-base timer counter counts down by using the internal count clock and the time-
base timer counter underflows due to the passage of the selected interval time, the time-base
timer interrupt request flag bit (TBTC:TBIF) is set to "1". If the time-base timer interrupt
request enable bit is enabled (TBTC:TBIE = 1), an interrupt request will be generated to the
interrupt controller.
• Regardless of the value of the TBIE bit, the TBIF bit is set to "1" when the selected bit
underflows.
• With the TBIF bit having been set to "1", if the TBIE bit is changed from the disable state
to the enable state (0
• The TBIF bit will not be set to "1" if the counter is cleared (TBTC:TCLR = 1) at the same
time as the time-base timer counter underflows.
• In the interrupt service routine, write "0" to the TBIF bit to clear an interrupt request.
Note:
When enabling the output of interrupt requests after cancelling a reset (TBTC:TBIE = 1),
always clear the TBIF bit at the same time (TBTC:TBIF = 0).
Table 7.3-1
Interrupt condition
Interrupt flag
Interrupt enable
MN702-00009-2v0-E
1), an interrupt request is generated immediately.
Interrupt of Time-base Timer
Item
The interval time set by "TBTC:TBC[3:0]" has elapsed.
TBTC:TBIF
TBTC:TBIE
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 7 TIME-BASE TIMER
Description
7.3 Interrupt
91