Fujitsu 8FX Hardware Manual page 413

MB95630H Series
generated by either the compare match of the level of the position input (SNI2 to SNI0) with
the RDA[2:0] bits in the 16-bit MPG output data register (upper) (OPDUR), or a edge detected
of the position input (SNI2 to SNI0) with one of 3 different kinds of edge setting.
When this interrupt is generated, the position detect interrupt flag bit in the 16-bit MPG output
control register (lower) (OPCLR:PDIF) is set to "1".
● Compare match interrupt
If the CPIE bit in the 16-bit MPG input control register (upper) (IPCUR) is set to "1", this
compare match interrupt is generated when the RDA[2:0] bits in the 16-bit MPG output data
register (upper) (OPDUR) are matched with the CPD[2:0] bits in the 16-bit MPG input control
register (upper) (IPCUR).
When this interrupt is generated, the Compare match interrupt flag bit in the 16-bit MPG input
control register upper (IPCUR:CPIF) is set to "1".
● DTTI interrupt
If the DTIE bit in the 16-bit MPG output control register (upper) (OPCUR) is set to "1", this
DTTI interrupt is generated whenever an "L" level input is detected at the DTTI pin.
When this interrupt is generated, the DTTI interrupt flag bit in the 16-bit output control register
(upper) (OPCUR:DTIF) is set to "1".
■ Multi-pulse Generator Interrupt Sources
• Interrupt A (DTTI)
This interrupt is generated when a DTTI interrupt occurs. DTTI interrupt is generated if
OPCUR:DTIE is set to "1" when an "L" level input is detected at the DTTI pin.
• Interrupt B (write timing/compare clear)
This interrupt is generated when either a write timing interrupt or a compare clear interrupt
occurs.
The write timing interrupt is generated if OPCUR:WTIE is set to "1" when a write timing
signal is generated from the data write control circuit.
The compare clear interrupt is generated if TCSR:ICRE is set to "1" when the count value
of 16-bit timer matches with the 16-bit MPG compare clear register (upper/lower)
(CPCUR/CPCLR).
• Interrupt C (position detection/compare interrupt)
This interrupt is generated when either a position detect interrupt or a compare match
interrupt occurs.
The position detect interrupt is generated if OPCLR:PDIE is set to "1" when an effective
edge at SNI2 to SNI0 is detected.
The compare match interrupt is generated if IPCUR:CPIE is set to "1" when the values of
the CPD[2:0] bits in the IPCUR register match with those of the RDA[2:0] bits in the
OPDUR register.
For the respective interrupt request numbers of interrupt sources, refer to "■ INTERRUPT
SOURCE TABLE" in the device data sheet.
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 21 MULTI-PULSE GENERATOR
21.4 Interrupts
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