Uart/Sio Serial Output Data Register Ch. N (Tdrn) - Fujitsu 8FX Hardware Manual

8-bit microcontroller new 8fx family
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CHAPTER 22 UART/SIO
22.7 Registers
22.7.5
UART/SIO Serial Output Data Register ch. n
(TDRn)
The UART/SIO serial output data register ch. n (TDRn) used for outputting
(transmitting) serial data.
■ Register Configuration
bit
7
Field
TD7
Attribute
R/W
Initial value
0
■ Register Functions
This register holds data to be transmitted. The register accepts a write when the transmit data
register empty flag bit (TDRE) is "1". An attempt to write to the bit is ignored when the bit
contains "0".
When transmit data is written to the UART/SIO serial output data register ch. n (TDRn), the
TDRE bit is set to "0". Upon completion of transfer of transmit data to the transmission shift
register, the TDRE bit is set to "1", enabling the next transmit data to be written to the TDRn
register. At this time, an interrupt occurs if transmit data register empty interrupts have been
enabled. Write the next piece of transmit data when transmit data empty occurs or the TDRE
bit is set to "1".
When the character bit length (SMC1n:CBL[1:0]) is set to shorter than eight bits, the excess
upper bits (beyond the set bit length) are ignored.
Note:
The data in this register cannot be updated when the TDRE bit in UART/SIO serial status
and data register ch.n (SSRn) is "0".
When this register is updated at writing complete the transmission data and TDRE = 0
(regardless of the setting of the TXE bit in the SMC2n register), the transmission
operation is initialized by writing "0" to TXE, the TDRE bit becomes "1", and updating this
register is enabled.
Moreover, when "0" is written to the TXE bit without transmission having started (when
the transmit data is written to the TDRn register, and the TXE bit has not been set to "1"
yet), the TCPL bit is not set to "1". In the case of modifying the transmit data, make the
TDRE bit become "1" once by writing "0" to the TXE bit before modifying the transmit
data.
484
6
5
TD6
TD5
R/W
R/W
0
0
FUJITSU SEMICONDUCTOR LIMITED
4
3
TD4
TD3
R/W
R/W
0
0
MB95630H Series
2
1
TD2
TD1
R/W
R/W
0
0
MN702-00009-2v0-E
0
TD0
R/W
0

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