• Module stop mode can be set
As the initial setting, A/D converter operation is halted. Register access is enabled by
exiting module stop mode.
14.1.2
Block Diagram
Figure 14-1 shows a block diagram of the A/D converter.
AV
CC
10-bit A/D
V
ref
AV
SS
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN12
AN13
AN14
AN15
ADTRG
ADCR
: A/D control register
ADCSR
: A/D control/status register
ADDRA
: A/D data register A
ADDRB
: A/D data register B
ADDRC
: A/D data register C
ADDRD
: A/D data register D
508
+
–
Comparator
Sample-and-
hold circuit
Figure 14-1 Block Diagram of A/D Converter
Module data bus
A
A
A
A
D
D
D
D
D
D
D
D
R
R
R
R
A
B
C
D
Control circuit
Internal data bus
A
A
D
D
C
C
S
R
R
ADI interrupt
signal
Conversion start
trigger from 8-bit
timer or TPU