Table of Contents
Advertisement
Channel Selection
CH3
CH2
0
0
1
1
0
1
14.2.3
A/D Control Register (ADCR)
Bit
:
TRGS1
Initial value :
R/W
:
R/W
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion operations.
ADCR is initialized to H'3F by a reset, and in standby mode or module stop mode.
Bits 7 and 6—Timer Trigger Select 1 and 0 (TRGS1, TRGS0): These bits select enabling or
disabling of the start of A/D conversion by a trigger signal. Only set bits TRGS1 and TRGS0
while conversion is stopped (ADST = 0).
514
CH1
CH0
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
7
6
TRGS0
—
0
0
R/W
—
Single Mode
(SCAN = 0)
Setting prohibited
AN12
AN13
AN14
AN15
AN0 (Initial value)
AN1
AN2
AN3
AN4
AN5
AN6
AN7
5
4
—
CKS1
1
1
—
R/W
Description
Scan Mode
(SCAN = 1)
Setting prohibited
AN12
AN12, AN13
AN12 to AN14
AN12 to AN15
AN0
AN0, AN1
AN0 to AN2
AN0 to AN3
AN4
AN4, AN5
AN4 to AN6
AN4 to AN7
3
2
CH3
—
1
1
R/W
—
1
0
—
1
1
—
Advertisement
Table of Contents
