Hitachi H8S/2338 Series Hardware Manual page 677

Table A-5 Number of Cycles in Instruction Execution (cont)
Instruction Mnemonic
EEPMOV EEPMOV.B
EEPMOV.W
EXTS EXTS.W Rd
EXTS.L ERd
EXTU EXTU.W Rd
EXTU.L ERd
INC INC.B Rd
INC.W #1/2,Rd
INC.L #1/2,ERd
JMP JMP @ERn
JMP @aa:24
JMP @@aa:8 Advanced
JSR JSR @ERn
JSR @aa:24
JSR @@aa:8 Advanced
LDC LDC #xx:8,CCR
LDC #xx:8,EXR
LDC Rs,CCR
LDC Rs,EXR
LDC @ERs,CCR
LDC @ERs,EXR
LDC @(d:16,ERs),CCR
LDC @(d:16,ERs),EXR
LDC @(d:32,ERs),CCR
LDC @(d:32,ERs),EXR
LDC @ERs+,CCR
LDC @ERs+,EXR
LDC @aa:16,CCR
LDC @aa:16,EXR
LDC @aa:32,CCR
LDC @aa:32,EXR
Instruction
Fetch
I
2
2
1
1
1
1
1
1
1
2
2
2
Advanced 2
Advanced 2
2
1
2
1
1
2
2
3
3
5
5
2
2
3
3
4
4
Branch
Address Stack
Read Operation
J K
2
2
2
2 2
Byte Word
Data Data Internal
Access Access Operation
L M N
2
2n+2*
2
2n+2*
1
1
1
1
1
1
1
1
1
1 1
1 1
1
1
1
1
673