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8.2.8
Port 2 Data Direction Register (P2DDR)
Bit
:
P27DDR P26DDR P25DDR P24DDR P23DDR P22DDR P21DDR P20DDR
Initial value :
R/W
:
P2DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 2.
Port 2 is multiplexed with pins PO7 to PO0. Bits corresponding to pins used for PPG output must
be set to 1. For further information about P2DDR, see the I/O Port section in the reference manual
for the relevant model.
8.2.9
Module Stop Control Register (MSTPCR)
Bit
:
15
Initial value :
0
R/W
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
MSTPCR is a 16-bit readable/writable register that performs module stop mode control.
When the MSTP11 bit in MSTPCR is set to 1, PPG operation stops at the end of the bus cycle and
a transition is made to module stop mode. Registers cannot be read or written to in module stop
mode. For details, see section 19.5, Module Stop Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 11—Module Stop (MSTP11): Specifies the PPG module stop mode.
Bit 11
MSTP11
Description
0
PPG module stop mode cleared
1
PPG module stop mode set
334
7
6
0
0
W
W
MSTPCRH
14
13
12
11
0
1
1
1
5
4
0
0
W
W
10
9
8
7
1
1
1
1
3
2
0
0
W
W
MSTPCRL
6
5
4
3
1
1
1
1
1
0
0
0
W
W
2
1
0
1
1
1
(Initial value)
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