Hitachi H8S/2338 Series Hardware Manual page 570

Automatic SCI Bit Rate Adjustment: When boot mode is initiated, the H8S/2338 Series,
H8S/2328 Series, or H8S/2318 Series chip measures the low period of the asynchronous SCI
communication data (H'00) transmitted continuously from the host. The SCI transmit/receive
format should be set as follows: 8-bit data, 1 stop bit, no parity. The chip calculates the bit rate of
the transmission from the host from the measured low period, and transmits one H'00 byte to the
host to indicate the end of bit rate adjustment. The host should confirm that this adjustment end
indication (H'00) has been received normally, and transmit one H'55 byte to the chip. If reception
cannot be performed normally, initiate boot mode again (reset), and repeat the above operations.
Depending on the host's transmission bit rate and the chip's system clock frequency, there will be
a discrepancy between the bit rates of the host and the chip. To ensure correct SCI operation, the
host's transfer bit rate should be set to 9,600 or 19,200 bps.
Table 17-9 shows typical host transfer bit rates and system clock frequencies for which automatic
adjustment of the MCU's bit rate is possible. The boot program should be executed within this
system clock range.
Start
bit
Table 17-9 System Clock Frequencies for which Automatic Adjustment of H8S/2338
Series, H8S/2328 Series, or H8S/2318 Series Bit Rate is Possible
Host Bit Rate
19,200 bps
9,600 bps
564
D0 D1 D2
Low period (9 bits) measured (H'00 data)
Figure 17-11 Automatic SCI Bit Rate Adjustment
System Clock Frequency for which Automatic Adjustment
of H8S/2338 Series, H8S/2328 Series, or H8S/2318 Series
Bit Rate is Possible
T.B.D.
T.B.D.
D3 D4 D5
Stop
D6 D7
bit
High period
(1 or more bits)