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16-Bit Access Space: Figure 4-5 illustrates data alignment control for the 16-bit access space.
With the 16-bit access space, the upper data bus (D
for accesses. The amount of data that can be accessed at one time is one byte or one word, and a
longword transfer instruction is executed as two word transfer instructions.
In byte access, whether the upper or lower data bus is used is determined by whether the address is
even or odd. The upper data bus is used for an even address, and the lower data bus for an odd
address.
Byte size
Byte size
Word size
Longword
size
Figure 4-5 Access Sizes and Data Alignment Control (16-Bit Access Space)
• Even address
• Odd address
1st bus cycle
2nd bus cycle
to D
) and lower data bus (D
15
8
Upper data bus
D
D
15
8
to D
7
0
Lower data bus
D
D
7
0
) are used
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