Register Configuration - Hitachi H8S/2338 Series Hardware Manual

11.1.4

Register Configuration

The SCI has the internal registers shown in table 11-2. These registers are used to specify
asynchronous mode or synchronous mode, the data format, and the bit rate, and to control the
transmitter/receiver.
Table 11-2 SCI Registers
1
Channel* Name
0 Serial mode register 0
Bit rate register 0
Serial control register 0
Transmit data register 0
Serial status register 0
Receive data register 0
Smart card mode register 0
1 Serial mode register 1
Bit rate register 1
Serial control register 1
Transmit data register 1
Serial status register 1
Receive data register 1
Smart card mode register 1
2 Serial mode register 2
Bit rate register 2
Serial control register 2
Transmit data register 2
Serial status register 2
Receive data register 2
Smart card mode register 2
All Module stop control register
Notes: 1. The number of channels differs from model to model; see the reference manual for the
relevant model for details.
2. Lower 16 bits of the address.
3. Can only be written with 0 for flag clearing.
Abbreviation R/W
SMR0 R/W
BRR0 R/W
SCR0 R/W
TDR0 R/W
SSR0 R/(W)*
RDR0 R
SCMR0 R/W
SMR1 R/W
BRR1 R/W
SCR1 R/W
TDR1 R/W
SSR1 R/(W)*
RDR1 R
SCMR1 R/W
SMR2 R/W
BRR2 R/W
SCR2 R/W
TDR2 R/W
SSR2 R/(W)*
RDR2 R
SCMR2 R/W
MSTPCR R/W
Initial Value Address*
H'00 H'FF78
H'FF H'FF79
H'00 H'FF7A
H'FF H'FF7B
3
H'84 H'FF7C
H'00 H'FF7D
H'F2 H'FF7E
H'00 H'FF80
H'FF H'FF81
H'00 H'FF82
H'FF H'FF83
3
H'84 H'FF84
H'00 H'FF85
H'F2 H'FF86
H'00 H'FF88
H'FF H'FF89
H'00 H'FF8A
H'FF H'FF8B
3
H'84 H'FF8C
H'00 H'FF8D
H'F2 H'FF8E
H'3FFF H'FF3C
2
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