Single Address Single Transfer From Memory To I/O (32-Bit Half Speed Rom) - Toshiba TX49 TMPR4937 Manual

Chapter 8 DMA Controller
8.5.8

Single Address Single Transfer from Memory to I/O (32-bit Half Speed ROM)

Figure 8.5.9 Single Address Single Transfer from Memory to I/O
(Single Read of 32-bit Data from 32-bit Half Speed ROM)
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