Single Address Single Transfer From I/O To Memory (32-Bit Sdram) - Toshiba TX49 TMPR4937 Manual

8.5.14

Single Address Single Transfer from I/O to Memory (32-bit SDRAM)

SDCLK
CS*
ADDR [19:5]
RAS*
CAS*
WE*
CKE*
OE*
DQM [7:0]
ff
DATA [31:0]
ACK*
DMAREQ[n]
DMAACK[n]
DMADONE*
Figure 8.5.15 Single Address Single Transfer from I/O to Memory
0002 0080
f0
00000100
(Single Write of 32-bit Data to 32-bit SDRAM)
8-54
Chapter 8 DMA Controller
0081
ff ff