Toshiba TX49 TMPR4937 Manual page 11

14.3.7 GPIO Operation ............................................................................................................................... 14-14
14.3.8 Interrupt ........................................................................................................................................... 14-15
14.3.9 AC-link Low-power Mode .............................................................................................................. 14-15
14.4 Registers..................................................................................................................................................... 14-16
14.4.1 ACLC Control Enable Register 0xF700 ......................................................................................... 14-17
14.4.2 ACLC Control Disable Register 0xF704 ........................................................................................ 14-20
14.4.3 ACLC CODEC Register Access Register 0xF708 .......................................................................... 14-22
14.4.4 ACLC Interrupt Status Register 0xF710......................................................................................... 14-23
14.4.5 ACLC Interrupt Masked Status Register 0xF714 ............................................................................ 14-25
14.4.6 ACLC Interrupt Enable Register 0xF718 ........................................................................................ 14-25
14.4.7 ACLC Interrupt Disable Register 0xF71C....................................................................................... 14-25
14.4.8 ACLC Semaphore Register 0xF720 .............................................................................................. 14-26
14.4.9 ACLC GPI Data Register 0xF740 ................................................................................................. 14-27
14.4.10 ACLC GPO Data Register 0xF744................................................................................................ 14-28
14.4.11 ACLC Slot Enable Register 0xF748.............................................................................................. 14-29
14.4.12 ACLC Slot Disable Register 0xF74C ............................................................................................ 14-31
14.4.13 ACLC FIFO Status Register 0xF750 ............................................................................................. 14-32
14.4.14 ACLC DMA Request Status Register 0xF780................................................................................ 14-34
14.4.15 ACLC DMA Channel Selection Register 0xF784 ........................................................................... 14-35
14.4.16 ACLC Audio PCM Output Data Register 0xF7A0.......................................................................... 14-36
14.4.17 ACLC Center Data Register 0xF7A8 ............................................................................................ 14-37
14.4.18 ACLC Audio PCM Input Data Register 0xF7B0............................................................................ 14-38
14.4.19 ACLC Modem Input Data Register 0xF7BC.................................................................................. 14-39
14.4.20 ACLC Revision ID Register 0xF7FC ............................................................................................ 14-40
15. Interrupt Controller ............................................................................................................................................... 15-1
15.1 Characteristics.............................................................................................................................................. 15-1
15.2 Block Diagram ............................................................................................................................................. 15-2
15.3 Detailed Explanation.................................................................................................................................... 15-4
15.3.1 Interrupt sources ................................................................................................................................ 15-4
15.3.2 Interrupt request detection ................................................................................................................. 15-5
15.3.3 Interrupt level assigning..................................................................................................................... 15-5
15.3.4 Interrupt priority assigning ................................................................................................................ 15-6
15.3.5 Interrupt notification .......................................................................................................................... 15-7
15.3.6 Clearing interrupt requests................................................................................................................. 15-7
15.3.7 Interrupt requests ............................................................................................................................... 15-8
15.4 Registers..................................................................................................................................................... 15-10
15.4.1 Interrupt Detection Enable Register (IRDEN) 0xF600.....................................................................15-11
15.4.2 Interrupt Detection Mode Register 0 (IRDM0) 0xF604 .................................................................. 15-12
15.4.3 Interrupt Detection Mode Register 1 (IRDM1) 0xF608 .................................................................. 15-14
15.4.4 Interrupt Level Register 0 (IRLVL0) 0xF610 .................................................................................. 15-17
15.4.5 Interrupt Level Register (IRLVL1) 0xF614 ..................................................................................... 15-19
15.4.6 Interrupt Level Register 2 (IRLVL2) 0xF618 .................................................................................. 15-21
15.4.7 Interrupt Level Register 3 (IRLVL3) 0xF61C ................................................................................. 15-22
15.4.8 Interrupt Level Register 4 (IRLVL4) 0xF620 .................................................................................. 15-24
15.4.9 Interrupt Level Register 5 (IRLVL5) 0xF624 ................................................................................ 15-26
15.4.10 Interrupt Level Register 6 (IRLVL6) 0xF628 .................................................................................. 15-28
15.4.11 Interrupt Level Register 7 (IRLVL7) 0xF62C ................................................................................. 15-30
15.4.12 Interrupt Mask Level Register (IRMSK) 0xF640............................................................................ 15-32
15.4.13 Interrupt Edge Detection Clear Register (IREDC) 0xF660 ............................................................. 15-33
15.4.14 Interrupt Pending Register (IRPND) 0xF680 .................................................................................. 15-34
15.4.15 Interrupt Current Status Register (IRCS) 0xF6A0........................................................................... 15-37
15.4.16 Interrupt Request Flag Register 0 (IRFLAG0) 0xF510 ................................................................... 15-39
15.4.17 Interrupt Request Flag Register 1 (IRFLAG1) 0xF514 ................................................................... 15-40
15.4.18 Interrupt Request Polarity Control Register (IRPOL) 0xF518 ........................................................ 15-41
15.4.19 Interrupt Request Control Register (IRRCNT) 0xF51C .................................................................. 15-42
15.4.20 Interrupt Request Internal Interrupt Mask Register (IRMASKINT) 0xF520 .................................. 15-43
15.4.21 Interrupt Request External Interrupt Mask Register (IRMASKEXT) 0xF524 ................................ 15-44
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