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3.
Signals
3.1
Pin Signal Description
In the following tables, asterisks at the end of signal names indicate active-low signals.
In the Type column, PU indicates that the pin is equipped with an internal pull-up resister and PD indicates
that the pin is equipped with an internal pull-down resister. OD indicates an open-drain pin.
The Initial State column shows the state of the signal when the RESET* signal is asserted and
immediately after it is deasserted. Those signals which are selected by a configuration signal upon a reset
have the state selected by the configuration signal even when the reset signal is asserted.
3.1.1
Signals Common to SDRAM and External Bus Interfaces
Table 3.1.1 Signals Common to SDRAM and External Bus Interfaces
Signal Name
Type
ADDR[19:0]
Input/output
Address
PU
Address signals.
For SDRAM, ADDR[19:5] are used (refer to Sections "9.3.2.2" and "9.3.2.3 Address
Signal Mapping").
When the external bus controller uses these pins, the meaning of each bit varies with the
data bus width (refer to Section "7.3.5 Data Bus Size").
The ADDR signals are also used as boot configuration signals (input) during a reset. For
details of configuration signals, refer to Section "3.2 Boot Configuration".
The ADDR signals are input signals only when the RESET* signal is asserted and
become output signals after the RESET* signal is deasserted.
DATA[63:0]
Input/output
Data
PU
64-bit data bus.
The DATA[15:0] signals are also used as boot configuration signals (input) during a reset.
For details of configuration signals, refer to Section "3.2 Boot Configuration".
BUSSPRT*
Output
Bus Separate
Controls the connection and separation of devices controlled by the external bus
controller to or from a high-speed device, such as SDRAM (refer to Section "7.6 Flash
ROM, SRAM Usage Example").
H: Separate devices other than SDRAM from the data bus.
L: Connect devices other than SDRAM to the data bus.
Separation and connection are performed using external bidirectional bus buffers (such
as the 74xx245).
Chapter 3 Signals
Description
3-1
Initial State
Input
Input
High
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