20.2 JTAG Boundary Scan Test
20.2.1
JTAG Controller and Register
The Extended EJTAG Interface contains a JTAG Controller (TAP Controller) and a Control Register.
This section explains only those portions that are unique to the TX4937. Please refer to the "64-bit TX
System RISC TX49/H2, TX49/H3, TX49/H4 Core Architecture" for all other portion not covered here.
Please contact your local Toshiba Sales representative for more information regarding the required
BSDL files when performing the JTAG Boundary Scan Test.
•
Instruction Register (Refer to 20.2.2)
•
Data Register
•
Boundary Scan Register (Refer to 20.2.3)
•
Bypass Register
•
Device ID Register (Refer to 20.2.4)
•
JTAG Address Register
•
JTAG Data Register
•
JTAG Control Register
•
EJTAG Mount Register
•
Test Access Port Controller (TAP Controller) (Refer to 20.3)
Chapter 20 Extended EJTAG Interface
20-2