Toshiba TX49 TMPR4937 Manual page 464

64-bit tx system risc
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Chapter 15 Interrupt Controller
Bit
Mnemonic
Field Name
Explanation
Read/Write
2:0
IL0
Interrupt Level 0
Interrupt Level of INT [0] (Default: 000)
R/W
These bits specify the interrupt level of ECC Error interrupts.
000: Interrupt level 0 (Interrupt disable)
001: Interrupt level 1
010: Interrupt level 2
011: Interrupt level 3
100: Interrupt level 4
101: Interrupt level 5
110: Interrupt level 6
111: Interrupt level 7
Figure 15.4.4 Interrupt Level Register 0 (2/2)
15-18

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