Aclc Interrupt Status Register 0Xf710 - Toshiba TX49 TMPR4937 Manual

14.4.4 ACLC Interrupt Status Register
This register shows various kinds of AC-link and ACLC status.
31
15 14 13 12
MODIE MODOE AUDIE
Reserved
RR RR RR
R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C
0 0 0
Bit Mnemonic Field Name
31:16 — Reserved
15 MODIERR Modem
Receive-data
DMA Overrun
14 MODOERR Modem
Transmit-data
DMA Underrun
⎯
13 Reserved
12 AUDIERR Audio
Receive-data
DMA Overrun
11 LFEERR Audio LFE
Transmit-data
DMA Underrun
Audio Center
10 CENTERR
Transmit-data
DMA Underrun
9 SURRERR Audio Surround
L&R
Transmit-data
DMA Underrun
8 AUDOERR Audio PCM
L&R Transmit-
data DMA
Underrun
⎯
7:6 Reserved
5 GPIOINT GPIO Interrupt
Reserved
11 10 9 8
CENTE SURRE AUDOE
LFEERR
RR RR RR
0 0 0 0
MODIERR: Modem Receive-data DMA Overrun
R 1: Indicates that the modem receive-data DMA overran.
W1C This bit is cleared when "1" is written to it.
MODOERR: Modem Transmit-data DMA Underrun
R 1: Indicates that the modem transmit-data DMA underran.
W1C This bit is cleared when "1" is written to it.
AUDIERR: Audio Receive-data DMA Overrun
R 1: Indicates that the audio receive-data DMA overran.
W1C This bit is cleared when "1" is written to it.
LFEERR: Audio LFE Transmit-data DMA Underrun
R 1: Indicates that the audio LFE transmit-data DMA underran.
W1C This bit is cleared when "1" is written to it.
CENTERR: Audio Center Transmit-data DMA Underrun
R 1: Indicates that the audio center transmit-data DMA underran.
W1C This bit is cleared when "1" is written to it.
SURRERR: Audio Surround L&R Transmit-data DMA Underrun
R 1: Indicates that the audio surround L&R transmit-data DMA
underran.
W1C This bit is cleared when "1" is written to it.
AUDOERR: Audio PCM L&R Transmit-data DMA Underrun
R 1: Indicates that the audio PCM L&R transmit-data DMA underran.
W1C This bit is cleared when "1" is written to it.
GPIOINT: GPIO Interrupt
R 1: Indicates that the incoming slot 12 bit[0] is '1' (the modem CODEC
GPIO interrupt).
W1C This bit is cleared if "1" is written to it while the incoming slot 12 bit[0]
is '0'.
Figure 14.4.4 ACINTSTS Register (1/2)
14-23
Chapter 14 AC-link Controller
0xF710
7 6 5 4 3
REGAC
Reserved Reserved
GPIOINT
CRDY
R/W1C R/W1C
0 1
Description
16
: Type
: Initial value
2 1 0
CODEC CODEC
1RDY 0RDY
: Type
R R
: Initial value
0 0
Read/Write
⎯
R/W1C
R/W1C
⎯
R/W1C
R/W1C
R/W1C
R/W1C
R/W1C
⎯
R/W1C