Single Address Single Transfer From I/O To Memory (32-Bit Half Speed Sram) - Toshiba TX49 TMPR4937 Manual

Chapter 8 DMA Controller
8.5.9

Single Address Single Transfer from I/O to Memory (32-bit Half Speed SRAM)

Figure 8.5.10 Single Address Single Transfer from I/O to Memory
(Single Write of 32-bit Data to 32-bit Half Speed SRAM)
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