ZiLOG eZ80 User Manual page 78

Table 37. Instruction Summary (Continued)
Instruction and Operation
MLT ss
ss[15:0] ← ss[15:8] X ss[7:0]
NEG
A ← 0 – A
NOP
OR A,s
A ← A OR s
OTD2R
repeat {
({00h, DE[15:0]} ← (HL))
BC ← BC – 1
DE ← DE – 1
HL ← HL – 1
} while BC ≠ 0
OTDM
({0000h, C}) ← (HL)
B← B – 1
C ← C – 1
HL ← HL – 1
OTDMR
repeat {
({0000h, C}) ← (HL)
B ← B – 1
C ← C – 1
HL ← HL – 1
} while B ≠ 0
Note: *This flag value is a function of the result of the affected operation.
— = No Change.
0 = Set to 0.
1 = Set to 1.
V = Set to 1 if overflow occurs.
X = Undetermined.
P = Set to the parity of the result (0 if odd parity, 1 if even parity).
IEF2 = The value of Interrupt Enable Flag 2.
UM007714-0908
Address Mode
Opcode(s)
Dest Source (Hex)
rr
ED 4C–6C
SP
ED 7C
ED 44
00
(HL) B6
ir
DD/FD B4–B5
(IX/Y+d) DD/FD B6 dd
n
F6
r
B0–B7
ED BC
ED 8B
ED 9B
®
eZ80 CPU
User Manual
Flags Affected
S Z H P/V N C
— — — — — —
* * * V 1 *
— — — — — —
* * 0 P 0 0
— 1 — — * —
X * X X * X
X 1 X X * X
CPU Instruction Set
69