ZiLOG eZ80 User Manual page 82

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Table 37. Instruction Summary (Continued)
Instruction and Operation
PUSH ss
if ADL mode {
(SPL) ← ss
SPL ← SPL – 3
}
else Z80 mode{
SPS ← ss
SPS ← SPS – 2
}
RES b,s
s[b] ← 0
RET
PC ← (SP)
RET cc
if cc {PC ← (SP)}
RETI
PC ← (SP)
RETN
Same as RET, with addition of
IEF1 ← IEF2
RL s
RLA
Note: *This flag value is a function of the result of the affected operation.
— = No Change.
0 = Set to 0.
1 = Set to 1.
V = Set to 1 if overflow occurs.
X = Undetermined.
P = Set to the parity of the result (0 if odd parity, 1 if even parity).
IEF2 = The value of Interrupt Enable Flag 2.
UM007714-0908
Address Mode
Opcode(s)
Dest Source
(Hex)
AF
F5
IX/Y
DD/FD E5
rr
C5-E5
(HL)
CB 86-BE
(IX/Y+d)
DD/FD CB dd
86-BE
r
CB 80-BF
C9
C0-F8
ED 4D
ED 45
(HL)
CB 16
(IX/Y+d)
DD/FD CB dd
16
r
CB 10-17
A
17
®
eZ80
CPU
User Manual
Flags Affected
S
Z
H P/V N
C
— — —
— —
— — —
— —
— — —
— —
— — —
— —
— — —
— —
— — —
— —
*
*
0
P
0
*
— —
0
0
*
CPU Instruction Set
73

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