ZiLOG eZ80 User Manual page 353

SLA (IX/Y+d)
Shift Left Arithmetic
Operation
C
Description
The (IX/Y+d) operand is an 8-bit value at the memory location specified by the contents
of the Index Register, IX or IY, added to the two's-complement displacement d. The CPU
manipulates the contents of this memory location, (IX/Y+d), by shifting them left one bit
position. The CPU next copies bit 7 into the Carry Flag and copies a 0 into bit 0 of the
memory location, (IX/Y+d).
Condition Bits Affected
S
Z
H
P/V
N
C
Attributes
Mnemonic Operand
SLA
SLA.S
SLA.L
SLA
SLA.S
SLA.L
UM007714-0908
7
(IX/Y+d)
Set if result is negative; reset otherwise.
Set if result is 0; reset otherwise.
Reset.
Set if parity is even; reset otherwise.
Reset.
Data from bit 7 of the source.
ADL Mode Cycle Opcode (hex)
(IX+d) X
(IX+d) 1
(IX+d) 0
(IY+d) X
(IY+d) 1
(IY+d) 0
0
0
7
DD, CB, dd, 26
8
52, DD, CB, dd, 26
8
49, DD, CB, dd, 26
7
FD, CB, dd, 26
8
52, FD, CB, dd, 26
8
49, FD, CB, dd, 26
®
eZ80 CPU
User Manual
344
CPU Instruction Set