ZiLOG eZ80 User Manual page 165

INC ir
Increment
Operation
ir ← ir+1
Description
The ir operand is any of the 8-bit CPU registers IXH, IXL, IYH, IYL. The contents of the
specified register increment by 1.
Condition Bits Affected
S
Z
H
P/V
N
C
Attributes
Mnemonic Operand
INC
INC
INC
INC
UM007714-0908
Set if result is negative; reset otherwise.
Set if result is 0; reset otherwise.
Set if carry from bit 3.
Set if operand was 7Fh before operation; reset otherwise.
Reset.
Not affected.
ADL Mode Cycle Opcode (hex)
IXH X
IXL X
IYH X
IYL X
2
DD, 24
2
DD, 2C
2
FD, 24
2
FD, 2C
®
eZ80 CPU
User Manual
156
CPU Instruction Set