ZiLOG eZ80 User Manual page 344

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SBC HL, rr
Subtract with Carry
Operation
HL ← HL – rr – C
Description
The rr operand is any of the multibyte CPU registers BC, DE, or HL. The rr operand and
the Carry Flag (C) are subtracted from the contents of the HL register. The result is written
to HL.
Condition Bits Affected
S
Z
H
P/V
N
C
Attributes
Mnemonic Operand
SBC
SBC.S
SBC.L
identifies either the BC, DE, HL, or SP multibyte register and is assembled into one of
kk
the Opcodes indicated in
UM007714-0908
Set if result is negative; reset otherwise.
Set if result is 0; reset otherwise.
Set if borrow from bit 12; reset otherwise.
Set if overflow; reset otherwise.
Set.
Set if borrow; reset otherwise.
ADL Mode Cycle Opcode (hex)
HL,rr
X
HL,rr
1
HL,rr
0
Table
95.
2
ED, kk
3
52, ED, kk
3
49, ED, kk
®
eZ80
CPU
User Manual
335
CPU Instruction Set

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