ZiLOG eZ80 User Manual page 254

LEA rr, IY+d
Load Effective Address
Operation
rr ← IY+d
Description
The rr operand is any of the multibyte CPU registers BC, DE, or HL. The CPU adds the
contents of the IY register to the signed displacement d and writes the sum to the multi-
byte rr register.
Condition Bits Affected
None.
Attributes
Mnemonic Operand
LEA
LEA.S
LEA.L
identifies either the BC, DE, or HL multibyte register and is assembled into one of the
kk
opcodes indicated in
Table 74. Register and kk Opcodes for LEA rr, IY+d Instruction (hex)
Register kk
BC
DE
HL
UM007714-0908
ADL Mode Cycle Opcode (hex)
X
rr,IY+d
1
rr,IY+d
0
rr,IY+d
Table 74.
03
13
23
3
ED, kk, dd
4
52, ED, kk, dd
4
49, ED, kk, dd
®
eZ80 CPU
User Manual
245
CPU Instruction Set