ZiLOG eZ80 User Manual page 372

TST A, (HL)
Test
Operation
A AND (HL)
Description
The (HL) operand is an 8-bit value at the memory location specified by the contents of the
multibyte register (HL). This 8-bit value is bitwise ANDed with the contents of the accu-
mulator, A. The appropriate flags are set to 1, depending on the result of the AND logical
operation. The contents of the accumulator and the memory location are not altered.
Condition Bits Affected
S
Z
H
P/V
N
C
Attributes
Mnemonic Operand
TST
TST.S
TST.L
UM007714-0908
Set if result is negative; reset otherwise.
Set if result is 0; reset otherwise.
Set.
Set if parity is even; reset otherwise.
Reset.
Reset.
ADL Mode Cycle Opcode (hex)
A,(HL) X
A,(HL) 1
A,(HL) 0
3
ED, 34
4
52, ED, 34
4
49, ED, 73
®
eZ80 CPU
User Manual
363
CPU Instruction Set