ZiLOG eZ80 User Manual page 110

AND A, ir
Logical AND
Operation
A ← A AND ir
Description
The ir operand is any of the 8-bit registers IXH, IXL, IYH, or IYL. The ir operand is bit-
wise ANDed with the contents of the accumulator, A. The result is stored in the accumula-
tor.
Condition Bits Affected
S
Z
H
P/V
N
C
Attributes
Mnemonic
AND
AND
AND
AND
UM007714-0908
Set if result is negative; reset otherwise.
Set if result is 0; reset otherwise.
Set.
Set if parity is even; reset otherwise.
Reset.
Reset.
Operand ADL Mode
A,IXH X
A,IXL X
A,IYH X
A,IYL X
Cycle Opcode (hex)
2
DD, A4
2
DD, A5
2
FD, A4
2
FD, A5
®
eZ80 CPU
User Manual
101
CPU Instruction Set