ZiLOG eZ80 User Manual page 279

OUT0 (n), r
Output to I/O
Operation
({UU, 00h, n}) ← r
Description
The r operand is any of A, B, C, D, E, H, or L. The n operand is placed on the lower byte
of the address bus, ADDR[7:0], while the High byte of the address bus, ADDR[15:8], is
forced to 0. The upper byte of the address bus, ADDR[23:16] is undefined for I/O
addresses. The CPU next outputs the contents of the r register to the I/O address {UU,
, n}.
00h
Condition Bits Affected
None.
Attributes
Mnemonic Operand
OUT0
identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes
jj
indicated in
Table 77. Register and
Register jj
A
B
C
D
E
H
L
UM007714-0908
ADL Mode Cycle Opcode (hex)
(n),r X
Table 77.
Opcodes for OUT0 (n), r Instruction (hex)
jj
39
01
09
11
19
21
29
4
ED, jj, nn
®
eZ80 CPU
User Manual
270
CPU Instruction Set