ZiLOG eZ80 User Manual page 358

SRA (IX/Y+d)
Shift Right Arithmetic
Operation
7
Description
The (IX/Y+d) operand is an 8-bit value at the memory location specified by the contents
of the Index Register, IX or IY, added to the two's-complement displacement d. The CPU
manipulates the contents of this memory location, (IX/Y+d), by shifting them right one bit
position. The CPU next copies the contents of bit 0 into the Carry Flag and leaves the pre-
vious contents of bit 7 unchanged.
Condition Bits Affected
S
Z
H
P/V
N
C
Attributes
Mnemonic Operand
SRA
SRA.S
SRA.L
SRA
SRA.S
SRA.L
UM007714-0908
0
(IX/Y+d)
Set if result is negative; reset otherwise.
Set if result is 0; reset otherwise.
Reset.
Set if parity is even; reset otherwise.
Reset.
Data from bit 0 of the source.
ADL Mode Cycle Opcode (hex)
(IX+d) X
(IX+d) 1
(IX+d) 0
(IY+d) X
(IY+d) 1
(IY+d) 0
C
7
DD, CB, dd, 2E
8
52, DD, CB, dd, 2E
8
49, DD, CB, dd, 2E
7
FD, CB, dd, 2E
8
52, FD, CB, dd, 2E
8
49, FD, CB, dd, 2E
®
eZ80 CPU
User Manual
349
CPU Instruction Set