Persistent Memory Mode Changes In Adl And Z80 Modes - ZiLOG eZ80 User Manual

Table 12. CPU Code Suffix to Assembled Prefix Mapping
CPU Code Suffix
.SIS
.LIS
.SIL
.LIL
The assembled prefix bytes replace Z80 and Z80180 instructions that do not offer a func-
tion. If an CPU assembler encounters one of these replaced instructions, it issues a warn-
ing message and assembles it as a standard NOP (
indicated in
Table 13. Z80 Instructions Replaced by Memory Mode Suffixes
Opcode Prefix
(hex)
40
49
52
5B
For the traditional Z80 prefix bytes, the CPU does not allow an interrupt to occur in the
time between fetching one of these prefix bytes and fetching the following instruction.
The traditional Z80 prefix bytes are
are not on the first page of the opcode map. The eZ80
( ,
40h 59h

Persistent Memory Mode Changes in ADL and Z80 Modes

The CPU can only make persistent mode switches between ADL mode and Z80 mode as
part of a special control transfer instruction (CALL, JP, RST, RET, RETI, or RETN), or
as part of an interrupt or trap operation. The Program Counter (PC) is thus prevented from
making an uncontrolled jump. When the memory mode is changed in any of these ways, it
remains in its new state until another of these operations changes the mode back. Persis-
tent mode changes are ideal for calling and executing a block of Z80-style code from
within a higher-level ADL mode program. Memory mode switching, using interrupts, and
traps are discussed in later sections of this manual.
UM007714-0908
Assembled Prefix Byte
Table 13.
Previous Z80 and Z180
Instruction
LD B,B
LD C,C
LD D,D
LD E,E
, , ) must precede the traditional Z80 prefix bytes.
52h 5Bh
(hex)
40
49
52
5B
). The CPU prefix bytes are
00h
New CPU Suffix
, , , and
CBh DDh EDh FDh
®
MEMORY mode prefix bytes
®
eZ80
User Manual
.SIS
.LIS
.SIL
.LIL
, which indicate opcodes that
Memory Mode Switching
CPU
25