ADC A, r
ADD with Carry
Operation
A ← A+r+C
Description
The r operand is any of the 8-bit CPU registers A, B, C, D, E, H, or L. The r operand and
the Carry Flag (C) are added to the contents of the accumulator, A. The result is stored in
the accumulator.
Condition Bits Affected
S
Z
H
P/V
N
C
Attributes
Mnemonic
ADC
identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes in
jj
Table
38.
UM007714-0908
Set if result is negative; reset otherwise.
Set if result is 0; reset otherwise.
Set if carry from bit 3; reset otherwise.
Set if overflow; reset otherwise.
Reset.
Set if carry from bit 7; reset otherwise.
Operand
ADL Mode
A,r
X
Cycle
Opcode (hex)
1
jj
®
eZ80
CPU
User Manual
83
CPU Instruction Set
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