Table 28. Bit Manipulation Instructions
Mnemonic
BIT
RES
SET
Table 29. Block Transfer and Compare Instructions
Mnemonic
CPD (CPDR)
CPI (CPIR)
LDD (LDDR)
LDI (LDIR)
Table 30. Exchange Instructions
Mnemonic
EX
EXX
Table 31. Input/Output Instructions
Mnemonic
IN
IN0
IND (INDR)
INDRX
IND2 (IND2R)
UM007714-0908
Instruction
Bit Test
Reset Bit
Set Bit
Instruction
Compare and Decrement (with
Repeat)
Compare and Increment (with
Repeat)
Load and Decrement (with Repeat)
Load and Increment (with Repeat)
Instruction
Exchange Registers
Exchange CPU Multibyte Register
Banks
Instruction
Input from I/O
Input from I/O on Page 0
Input from I/O and Decrement (with
Repeat)
Input from I/O and Decrement
Memory Address with Stationary I/O
Address
Input from I/O and Decrement (with
Repeat)
eZ80
User Manual
Page(s)
106–110
288–291
339–342
Page(s)
124–125
126–127
238–239
240–241
Page(s)
143–146
147
Page(s)
150–151
153
163
170
164–165
CPU Instruction Set
®
CPU
55
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