Instruction Summary - ZiLOG eZ80 User Manual

Instruction Summary

Table 37
preceding sections. In addressing modes where the same location acts as both the
destination (Dest) and the source (Source), the information is centered between the Dest
and Source columns (for example, the DEC instruction). The instruction summary table is
sorted alphabetically by the assembly language mnemonics.
Table 37. Instruction Summary
Instruction and Operation
ADC A,s
A ← A+s+C
ADC HL,ss
HL ← HL+ss+C
ADD A,s
A ← A+s
ADD HL,ss
HL ← HL+ss
ADD IX/Y,ss
IX/Y ← IX/y+ss
AND A,s
A ← A AND s
Note: *This flag value is a function of the result of the affected operation.
— = No Change.
0 = Set to 0.
1 = Set to 1.
V = Set to 1 if overflow occurs.
X = Undetermined.
P = Set to the parity of the result (0 if odd parity, 1 if even parity).
IEF2 = The value of Interrupt Enable Flag 2.
UM007714-0908
describes each type or class of instruction, using the notation described in the
Address Mode
Dest Source
Opcode(s)
(Hex)
(HL)
8E
ir
DD/FD 8C–8D
(IX/Y+d) DD/FD 8E dd
n
CE
r
88–8F
rr
ED 4A–6A
SP
ED 7A
(HL) 86
ir
DD/FD 84–85
(IX/Y+d) DD/FD 86 dd
n
C6
r
80–87
rr
09–29
SP
39
rxy
DD/FD 09–29 — —
SP
DD 39
(HL)
A6
ir
DD/FD A4–A5
(IX/Y+d) DD/FD A6 dd
n
E6
r
A0–A7
®
eZ80 CPU
User Manual
Flags Affected
S Z H P/V N C
* * * V 0 *
* * * V 0 *
* * * V 0 *
— — * — 0 *
* — 0 *
* * 1 P 0 0
CPU Instruction Set
59