Addressing Modes
The eZ80
memory address can be formed using several different methods, as outlined in the follow-
ing text. The addressing modes supported are a function of each instruction.
Implied Register Addressing
Certain opcodes automatically imply a particular register to be used during execution.
Implied register instructions include many arithmetic operations that inherently reference
the accumulator (A), the Index registers (IX and IY), the Stack Pointer (SPS or SPL), or
the general purpose working registers. Instructions using implied register addressing
include INC A, EXX, and CCF.
Restart Addressing
The eZ80
Program Counter (PC) to any of eight locations within the first 256 bytes of memory. In
Z80 mode, the 16-bit program counter (PC) is set to one of the following values—
,
0008h
ister is unaffected by a RST instruction. Therefore the restart jumps to a location on the
current Z80 page. In ADL mode, the 24-bit Program Counter (PC) is set to any of the fol-
lowing 24-bit addresses:
•
000000h
•
000008h
•
000010h
•
000018h
•
000020h
•
000028h
•
000030h
•
000038h
Register Indirect Addressing
The memory operand address is taken from one of the multibyte BC, DE or HL registers.
Register indirect addressing is displayed in
UM007714-0908
®
CPU instruction set includes many different memory addressing modes. The
®
CPU features eight special single-byte restart (RST) instructions that set the
,
,
,
0010h
0018h
0020h
,
, or
0028h
0030h
0038h
Figure
6.
eZ80
User Manual
. In Z80 mode, the MBASE reg-
Addressing Modes
®
CPU
48
,
0000h
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