ZiLOG eZ80 User Manual page 293

PUSH IX/Y
Push Stack
Operation
if ADL mode {
(SPL – 1) ← IX/Y[23:16]
(SPL – 2) ← IX/Y[15:8]
(SPL – 3) ← IX/Y[7:0]
SPL ← SPL – 3
}
else Z80 mode {
(SPS – 1) ← IX/Y[15:8]
(SPS – 2) ← IX/Y[7:0]
SPS ← SPS – 2
}
Description
In ADL mode, or when the .L suffix is employed, 3 bytes are pushed onto the memory
locations indicated by SPL, in the following sequence:
1. The CPU writes the contents of the upper byte of the specified Index Register, IXU or
IYU, to the memory location with address SPL
2. The CPU next writes the contents of the High byte of the specified Index Register,
IXH or IYH, to the memory location with address SPL
3. The CPU next writes the contents of the Low byte of the specified Index Register, IXL
or IYL, to the memory location with address SPL
SPL decrements by three.
In Z80 mode, or when the .S suffix is employed, 2 bytes are pushed onto the memory loca-
tions indicated by SPS, in the following sequence:
1. The CPU writes the contents of the High byte of the specified Index Register, IXH or
IYH, to the memory location with address SPS
2. The CPU next writes the contents of the Low byte of the specified Index Register, IXL
or IYL, to the memory location with address SPS
SPS decrements by two.
Condition Bits Affected
None.
UM007714-0908
1.
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2.
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3.
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1.
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2.
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CPU Instruction Set
®
eZ80 CPU
User Manual
284