ZiLOG eZ80 User Manual page 374

TST A, r
Test
Operation
A AND r
Description
The r operand is any of the 8-bit CPU registers A, B, C, D, E, H, or L. The r operand is
bitwise ANDed with the contents of the accumulator, A. The appropriate flags are set to 1,
depending on the result of the AND logical operation. The contents of the accumulator
and the r operand are not altered.
Condition Bits Affected
S
Z
H
P/V
N
C
Attributes
Mnemonic Operand
TST
identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes
jj
indicated in
UM007714-0908
Set if result is negative; reset otherwise.
Set if result is 0; reset otherwise.
Set.
Set if parity is even; reset otherwise.
Reset.
Reset
ADL Mode Cycle Opcode (hex)
A,r X
Table 103.
2
ED, jj
®
eZ80 CPU
User Manual
365
CPU Instruction Set