ZiLOG eZ80 User Manual page 198

LD A, I
Load Accumulator
Operation
A ← I[7:0]
Description
The CPU writes the contents of the lower byte of the Interrupt Vector register, I[7:0], to
the accumulator, A.
Condition Bits Affected
S
Z
H
P/V
N
C
Attributes
Mnemonic Operand
LD
UM007714-0908
Set if the I register is negative; reset otherwise.
Set if the I register is 0; reset otherwise.
Reset.
Contains contents of IEF2.
Reset.
Not affected.
ADL Mode Cycle Opcode (hex)
A, I X 2
ED, 57
®
eZ80 CPU
User Manual
189
CPU Instruction Set