Ez80 ® Cpu Instruction Notations - ZiLOG eZ80 User Manual

description of instruction operands. The nomenclature is defined with special emphasis on
mnemonic values and readability.
The movement of data is indicated by a single opcode, regardless whether the movement
is between different registers or between registers and memory locations. For example, the
first operand of an LD instruction is the destination of the operation and the second
operand is the source of the operation. Thus, LD A, B indicates that the contents of the
second operand, working register B, are to be transferred to the first operand, which is the
accumulator, A. In the opcode descriptions, this operation is often represented as:
←
A B
Similarly, LD C,
← 3Fh
C
Enclosing an operand in parentheses indicates a memory location addressed by the
contents of the parentheses (i.e. an indirect memory access). For example, LD BC, (HL)
indicates that the contents of the multibyte HL register are used as an address to a memory
location. Multi-byte register BC is loaded with the data stored at the memory location
pointed to by the contents of HL:
←
BC (HL)
Similarly, LD (IX+6), C indicates that the contents of register C are to be stored in the
memory location addressed by the current value in the multibyte IX register plus 6:
(IX+6)
®
eZ80 CPU Instruction Notations
The notations in the CPU instructions are defined in
Table 26. Instruction Notations
Mnemonic
cc
cc'
d
ir or ir'
IX/Y
(IX/Y+d)
UM007714-0908
indicates that the constant
3Fh
←
C
Definition
Condition code C, NC, Z, NZ, P, M, PO, or PE—tests of
single bits in Flags register
Condition code C, NC, Z, or NZ—tests of single bits in
Flags register
An 8-bit two's complement displacement with value from
–128 to 127
8-bit CPU register IXH (IX[15:8]), IXL (IX[7:0]), IYH
(IY[15:8]), or IYL (IY[7:0])
CPU Index Register IX or IY
A location in memory with address formed by the sum of
the contents of the Index Register, IX or IY, and the two's-
displacement
complement
is written to working register C:
3Fh
Table 26.
d
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eZ80 CPU
User Manual
53
CPU Instruction Set