Table 22. Interrupt Mode 0 Operation
Current
Memory Mode
Z80 mode
ADL mode
Z80 mode
UM007714-0908
ADL
MADL
Mode
Control
Operation (if RST n or CALL Mmn is placed on the
Bit
Bit
data bus)
0
0
Read the RST n of CALL mn instruction placed on the
data bus, D[7:0], by the interrupting peripheral.
IEF1 ← 0
IEF2 ← 0
The starting program counter is {MBASE, PC[15:0]}.
Push the 2-byte return address, PC[15:0], onto the
{MBASE,SPS} stack. The ADL mode bit remains
cleared to 0. Write {00h, nn} or {mm, nn} to PC[15:0].
The ending program counter is {MBASE,
PC[15:0]} = {MBASE, 00h, nn} or {MBASE, mm, nn}.
The interrupt service routine must end with RETI.
1
0
Read RST n or CALL Mmn instruction placed on the
data bus, D[7:0], by the interrupting peripheral.
IEF1 ← 0
IEF2 ← 0
The starting program counter is PC[23:0]. Push the 3-
byte return address, PC[23:0], onto the SPL stack. The
ADL mode bit remains set to 1. Write {0000h, nn} or
{MM, mm, nn} to PC[23:0]. The ending program
counter is PC[23:0] = {0000h, nn} or {MM, mm, nn}.
The interrupt service routine must end with RETI.
0
1
Read RST n or CALL Mmn instruction placed on the
data bus, D[7:0], by interrupting peripheral.
IEF1 ← 0
IEF2 ← 0
The starting program counter is {MBASE, PC[15:0]}.
Push the 2-byte return address, PC[15:0], onto the
SPL stack. Push a 02h byte onto the SPL stack,
indicating interrupting from Z80 mode (because
ADL = 0). Set the ADL mode bit to 1. Write {0000h, nn}
or {MM, mm, nn} to PC[23:0]. The ending program
counter is PC[23:0] = {0000h, nn} or {MM, mm, nn}.
The interrupt service routine must end with RETI.L
®
eZ80
CPU
User Manual
39
Interrupts
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