ZiLOG eZ80 User Manual page 300

RES b, r
Reset Bit
Operation
r[b] ← 0
Description
The r operand is any of the 8-bit CPU registers A, B, C, D, E, H, or L. Bit b of the speci-
fied register r is reset to 0.
Condition Bits Affected
None.
Attributes
Mnemonic Operand
RES
= binary code
jj
the A, B, C, D, E, H, or L register and
object code, as indicated in
Table 82. Register,
Bit
Tested
0
1
2
3
4
5
6
7
UM007714-0908
ADL Mode Cycle Opcode (hex)
X
b,r
, and
10 bbb rrr
Table 82.
, and
bbb rrr
Register rrr
bbb
A
000 111
B
001 000
C
010 001
D
011 010
E
100 011
H
101 100
L
110 101
111
2
CB, jj
= binary code
kk 10 bbb 110
identifies the bit tested and assembled into the
bbb
Opcodes for RES b, r Instruction (hex)
®
eZ80 CPU
User Manual
; where identifies
rrr
CPU Instruction Set
291