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R
Table 3-12: Ethernet MAC Mode Configuration Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
LINK
0x300
SPEED
Bit
[23:0]
Reserved.
Receive 16-bit Client Interface enable: When this bit is 1, the
receive data client interface is 16 bits wide. When this bit is 0, the
[24]
receive data client interface is 8 bits wide. This bit is valid only
when using 1000BASE-X PCS/PMA mode.
Transmit 16-bit Client Interface enable: When this bit is 1, the
transmit data client interface is 16 bits wide. When this bit is 0,
[25]
the transmit data client interface is 8 bits wide. This bit is valid
only when using 1000BASE-X PCS/PMA mode.
Host Interface enable: When this bit is 1, the host interface is
[26]
enabled. When this bit is 0, the host interface is disabled.
"Tie-Off Pins" on page 28.
1000BASE-X mode enable: When this bit is 1, the Ethernet MAC
[27]
is configured in 1000BASE-X mode.
SGMII mode enable: When this bit is 1, the Ethernet MAC is
[28]
configured in SGMII mode.
RGMII mode enable: When this bit is 1, the Ethernet MAC is
[29]
configured in RGMII mode.
Speed selection: The speed of the Ethernet MAC is defined by
the following values:
10 = 1000 Mb/s
[31:30]
01 = 100 Mb/s
00 = 10 Mb/s
11 = N/A
www.BDTIC.com/XILINX
Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
Description
www.xilinx.com
9
8
7
RESERVED
Default Value
–
TIEEMAC#CONFIGVEC[65]
TIEEMAC#CONFIGVEC[66]
See
TIEEMAC#CONFIGVEC[67]
TIEEMAC#CONFIGVEC[68]
TIEEMAC#CONFIGVEC[69]
TIEEMAC#CONFIGVEC[70]
TIEEMAC#CONFIGVEC[72:71]
Host Interface
6
5
4
3
2
1
0
R/W
R
R
R
R
R
R
R/W
77
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