Xilinx Virtex-4 User Manual page 52

Fpga embedded tri-mode ethernet mac
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Chapter 3: Client, Host, and MDIO Interfaces
SGMII/1000BASE-X PCS/PMA
In SGMII or 1000BASE-X PCS/PMA mode, an entire data stream received from
PHYEMAC#RXD is passed on to EMAC#CLIENTRXD with some latency. This includes
the code group described in
the position of the first destination address byte all the way to the last byte of the payload.
Figure 3-16
and 1000BASE-X PCS/PMA mode.
CLIENTEMAC#RXCLIENTCLKIN
PHYEMAC#RXCHARISCOMMA
PHYEMAC#RXCHARISK
PHYEMAC#RXD[7:0]
EMAC#CLIENTRXD[7:0]
EMAC#RXCLIENTDVLD
EMAC#CLIENTRXGOODFRAME
EMAC#CLIENTRXBADFRAME
EMAC#CLIENTRXSTATS[6:0]
EMAC#CLIENTRXSTATSVLD
CLIENTEMAC#RXCLIENTCLKIN
PHYEMAC#RXCHARISCOMMA
PHYEMAC#RXCHARISK
PHYEMAC#RXD[7:0]
EMAC#CLIENTRXD[7:0]
EMAC#RXCLIENTDVLD
EMAC#CLIENTRXGOODFRAME
EMAC#CLIENTRXBADFRAME
EMAC#CLIENTRXSTATS[6:0]
EMAC#CLIENTRXSTATSVLD
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52
Table
and
Figure 3-17
show the timing of a normal inbound frame transfer in SGMII
/I1/
/I2/ /I2/
/I2/
/I2/ /S/
Figure 3-16: Inbound Frame Transfer (Front)
1
10
DATA
PREAMBLE
DA
Figure 3-17: Inbound Frame Transfer (Back)
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3-1. The assertion of EMAC#RXCLIENTDVLD indicates
PREAMBLE
DA
20
FCS
SA
TL
Embedded Tri-Mode Ethernet MAC User Guide
TL
SA
Data
PRE
UG074_3_18_072705
30
40
/T/
/R/
/I1/
Data
UG074_3_19_072705
UG074 (v2.2) February 22, 2010
R

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