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R
Table 3-8: Receiver Configuration Register (Word 0)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
0x200
Bit
Pause Frame Ethernet MAC Address [31:0]. This address is used
to match the Ethernet MAC against the destination address of
any incoming flow control frames. It is also used by the flow
[31:0]
control block as the source address for any outbound flow
control frames.
Tie to the same value as TIEEMAC#UNICASTADDR[31:0].
Table 3-9: Receiver Configuration Register (Word 1)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
0x240
Bit
Pause frame Ethernet MAC Address [47:32]. Tie to the same
[15:0]
value as TIEEMAC#UNICASTADDR[47:32].
[24:16]
Reserved.
Length/Type Check disable. When this bit is 1, it disables the
[25]
comparison of the L/T field with the size of the data.
Half-duplex mode: When this bit is 1, the receiver operates in
[26]
half-duplex mode. When the bit is 0, the receiver operates in full-
duplex mode.
VLAN enable: When this bit is 1, the receiver accepts VLAN
[27]
tagged frames. The maximum payload length increases by four
bytes.
Receive enable: When this bit is 1, the receiver block is enabled
[28]
to operate. When the bit is 0, the receiver ignores activity on the
physical interface receive port.
In-band FCS enable: When this bit is 1, the receiver passes the
FCS field up to the client. When this bit is 0, the FCS field is not
[29]
passed to the client. In either case, the FCS is verified on the
frame.
Jumbo frame enable: When this bit is 1, the Ethernet MAC
receiver accepts frames over the maximum length specified in
[30]
IEEE Std 802.3-2002 specification. When this bit is 0, the receiver
only accepts frames up to the specified maximum.
Reset: When this bit is 1, the receiver is reset. The bit
[31]
automatically reverts to 0, This reset also sets all of the receiver
configuration registers to their default values.
www.BDTIC.com/XILINX
Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
PAUSE_FRAME_ADDRESS[31:0]
Description
RESERVED
Description
www.xilinx.com
9
8
7
6
5
Default Value
TIEEMAC#CONFIGVEC[31:0]
9
8
7
6
5
PAUSE_FRAME_ADDRESS[47:32]
Default Value
TIEEMAC#CONFIGVEC[47:32]
–
TIEEMAC#CONFIGVEC[63]
TIEEMAC#CONFIGVEC[48]
TIEEMAC#CONFIGVEC[49]
TIEEMAC#CONFIGVEC[50]
TIEEMAC#CONFIGVEC[51]
TIEEMAC#CONFIGVEC[52]
TIEEMAC#CONFIGVEC[53]
Host Interface
4
3
2
1
0
R/W
R/W
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
75
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