Xilinx Virtex-4 User Manual page 126

Chapter 4: Physical Interface
Table 4-4: Maximum Frame Sizes for MGT RX Elastic Buffers (100 ppm Clock Tol.)
FPGA Logic Elastic Buffer
For reliable SGMII operation at 10 Mb/s (non-jumbo frames), the MGT RX elastic buffer
must be bypassed and a larger buffer implemented in the FPGA logic. The RX elastic buffer
in FPGA logic, provided by the example design, is twice the size and nominally provides
64 entries above and below the half-full threshold. This configuration can manage
standard (non-jumbo) Ethernet frames at all three SGMII speeds.
Figure 4-19
FIFO word corresponds to a single character of data (equivalent to a single byte of data
following 8B/10B decoding). This buffer can optionally be used to replace the RX elastic
buffers of the MGT. See
The shaded area in
frame reception.
•
•
This analysis assumes that the buffer is approximately at the half-full level at the start of
the frame reception. As illustrated, there are two locations of uncertainty above and below
the exact half-full mark of 64 as a result of the clock correction decision, which is based
across an asynchronous boundary.
Since there is a worst-case scenario of one clock edge difference every 5000 clock periods,
the maximum number of clock cycles (bytes) that can exist in a single frame passing
through the buffer before an error occurs is 5000 x 56 = 280000 bytes.
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126
Standard Speed
SGMII 100 Gb/s
SGMII 10 Gb/s
illustrates alternative FPGA logic RX elastic buffer depth and thresholds. Each
"Using the FPGA Logic Elastic Buffer," page
128
Figure 4-19: Elastic Buffer Size for FPGA Logic Buffer
Figure 4-19
If the buffer is filling during frame reception, then there are 122 – 66 = 56 FIFO
locations available before the buffer hits the overflow mark.
If the buffer is emptying during reception, then there are 62 – 6 = 56 FIFO locations
available before the buffer hits the underflow mark.
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Maximum Frame Size
7,000
700
SGMII FPGA
RX Elastic Buffer
122 - Overflow Mark
66
62
6 - Underflow Mark
UG074_4_19_012408
represents the usable buffer availability for the duration of
Embedded Tri-Mode Ethernet MAC User Guide
128.
UG074 (v2.2) February 22, 2010
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